In the field of imaging sensors, charge-coupled devices (CCDs) are the most common type of image sensors in use today for both consumer electronics and machine vision applications. A CCD utilizes charge generated by the photo-electric effect and collected in an individual pixel's potential well. At the end of a light collection period, charge is transferred from one potential well to the next, across a row of pixels. One column of charge is next transferred to a sense node capacitance, where each pixel's charge value is converted to a voltage, and can be read out to form pixel image data. This is a serial process that is dependent on an efficient means of charge transfer from pixel to pixel.
Typically, the pixel is built on 10–20 microns of epitaxial silicon, on top of about 500 microns of silicon substrate. The substrate is highly doped and kept at ground potential. To achieve a high level of pixel-to-pixel charge transfer efficiency, a separate buried channel is fabricated to provide a low-loss path for charge transfer. In such a buried channel CCD structure, light passes through the surface region of the CCD and generates charges in the n- and p-regions. The n-epitaxial region defines the buried channel which collects the electrons from photon induced electron-hole pairs. Electrons generated in the deeper p-region diffuse towards this buried channel, and are also collected there. Doped p-material at the edges of the n-channel is grounded and defines the channel stops between pixel regions.
Various CCD architectures exist: full frame, frame transfer, interline transfer and frame interline transfer. Full frame CCD combines the imaging array with a serial readout register for data transfer. It requires a very fast readout time, or shuttering, to avoid smear as the data is read out serially. It is still used for “long-stare” applications in astronomy. Frame transfer CCD requires two arrays, an imaging array of CCDs, and a light-shielded storage array to receive the image array data in high-speed parallel fashion. A serial readout register then transfers the data from the storage array. An interline transfer CCD has an imaging section made of alternating vertical columns of light detector pixels and readout registers. Image data is transferred immediately to the storage register for fast frame rate and reduced smear, and then the data is transferred to the serial readout register at the edge of the array. There is an inherent 2× loss of resolution in the horizontal direction for interline transfer. Frame interline transfer adds a light-shielded storage array to the image array of the interline transfer CCD, and basically provides an electronic shuttering capability to the imaging system.
A process optimized to fabricate CCD devices is not suitable to fabricate standard complementary metal-oxide semiconductor (CMOS) devices. This presents great difficulty in any attempt to combine CCD and CMOS circuitry on the same chip. Other pixel structures do exist, including charge injection devices (CID) and active pixel sensors (APS); however, like CCDs, the designs in use today for these other structures have their own inherent disadvantages which reduce their suitability for certain types of imaging applications.
As described in Burke and Michon, “Charge-Injection Imaging: Optical Techniques and Performance Characteristics,” IEEE Journal of Solid-State Circuits, Vol. SC-11, No. 1, pp. 121–127 (1976), CID imagers consist of pixels made of two photocapacitors, one connected to column circuitry and one connected to row circuitry. Row/column circuits select individual pixels and sense charge capacitively on either gate structure. Charge is collected under one photocapacitor, and moved to the other for signal readout. However, this CID technology has significant noise issues associated with its use; for example, large bus capacitance for charge sensing leads to poor charge-to-voltage signal gain, and low noise floors are difficult to achieve throughout the array.
APS imagers utilize pixels that contain at least one active transistor to drive the output lines and aid in charge-to-voltage conversion gain. Thus, APS does not transfer charge serially as does the CCD. See, for example, Mendis, Kemeny, & Fossum, “CMOS Active Pixel Sensor,” IEEE Transactions on Electron Devices, Vol. 41, No. 3, pp. 452–453, March 1994, and U.S. Pat. Nos. 5,471,515 and 6,021,172 issued to E. R. Fossum et al. One advantage of the APS design is that the imager can be formed from pixels constructed to some extent within the bounds of a CMOS process. This opens up the possibility of incorporating other CMOS circuitry into the sensor.
Most image processing techniques utilize software-based algorithms to process frames of image data outputted from the imaging sensor. The sensor data is converted to digital data and stored in memory for subsequent processing by a microprocessor executing the desired image processing software algorithms. Although suitable for many applications, this approach to image processing can be overly complex for special purpose machine vision applications, resulting in unnecessarily slow frame processing rates using cumbersome hardware and computationally complex software algorithms.
One approach to simplify the desired image processing is to implement at least some portion of it in hardware. However, there are difficulties with this approach as well including, in particular, combining the pixel circuits with other hardware processing circuits, as well as providing storage of pixel values that must be accessed more than once to carry out the hardware processing algorithm. In the case of CCD imagers, the inability to combine the sensor with CMOS devices on a single substrate make on-chip hardware processing difficult if not impossible to accomplish using standard CMOS techniques. Also, while APS imagers of the type noted above can be combined with other CMOS circuitry, and while they provide a pixel array that is independently addressable on a row and column basis, they do not provide a non-destructive readout of data, meaning that the data can only be read once. Since certain signal processing algorithms require multiple use of selected portions on the pixel array, the pixel data must be buffered or otherwise stored so it can be accessed as many times as required by the algorithm. This again increases the complexity and expense of the hardware.
Accordingly, it is a general object of the invention to provide a imaging sensor having individually-addressable pixels that is compatible with CMOS technology and that provides a non-destructive readout which can be read multiple times.